A wideband noise-canceling CMOS LNA exploiting a transformer

A broadband LNA incorporating single-ended to differential conversion, has been successfully implemented using a noise-canceling technique and a single on-chip transformer. The LNA achieves a high voltage gain of 19dB, a wideband input match (2.5-4.0 GHz), and a noise figure of 4-5.4 dB, while consuming only 8mW. The LNA is implemented in a 90nm CMOS process with 6 metal layers

The BLIXER, a Wideband Balun-LNA-I/Q-Mixer Topology

This paper proposes to merge an I/Q current-commutating mixer with a noise-canceling balun-LNA. To realize a high bandwidth, the real part of the impedance of all RF nodes is kept low, and the voltage gain is not created at RF but in baseband where capacitive loading is no problem. Thus a high RF bandwidth is achieved without using inductors for bandwidth extension. By using an I/Q mixer with 25% duty-cycle LO waveform the output IF currents have also 25% duty-cycle, causing 2 times smaller DC-voltage drop after IF filtering. This allows for a 2 times increase in the impedance level of the IF filter, rendering more voltage gain for the same supply headroom. The implemented balun-LNA-I/Q-mixer topology achieves > 18 dB conversion gain, a flat noise figure < 5.5 dB from 500 MHz to 7 GHz, IIP2 = +20 dBm and IIP3 = -3 dBm. The core circuit consumes only 16 mW from a 1.2 V supply voltage and occupies less than 0.01 mm2 in 65 nm CMOS

A 1.2-V 10- µW NPN-Based Temperature Sensor in 65-nm CMOS With an Inaccuracy of 0.2 °C (3σ) From 70 °C to 125 °C

An NPN-based temperature sensor with digital output transistors has been realized in a 65-nm CMOS process. It achieves a batch-calibrated inaccuracy of ±0.5 ◦C (3¾) and a trimmed inaccuracy of ±0.2 ◦C (3¾) over the temperature range from −70 ◦C to 125 ◦C. This performance is obtained by the use of NPN transistors as sensing elements, the use of dynamic techniques, i.e. correlated double sampling and dynamic element matching, and a single room-temperature trim. The sensor draws 8.3 μA from a 1.2-V supply and occupies an area of 0.1 mm2

A 2.5-10-GHz clock multiplier unit with 0.22-ps RMS jitter in standard 0.18-μm CMOS

This paper demonstrates a low-jitter clock multiplier unit that generates a 10-GHz output clock from a 2.5-GHz reference clock. An integrated 10-GHz LC oscillator is locked to the input clock, using a simple and fast phase detector circuit that overcomes the speed limitation of a conventional tri-state phase frequency detector due to the lack of an internal feedback loop. A frequency detector guarantees PLL locking without degenerating jitter performance. The clock multiplier is implemented in a standard 0.18-μm CMOS process and achieves a jitter generation of 0.22 ps while consuming 100 mW power from a 1.8-V supply

A Low-Voltage Mobility-Based Frequency Reference for Crystal-Less ULP Radios

The design of a 100 kHz frequency reference based on the electron mobility in a MOS transistor is presented. The proposed low-voltage low-power circuit requires no off-chip components, making it suitable for application in wireless sensor networks (WSN). After a single-point calibration, the spread of its output frequency is less than 1.1% (3 ) over the temperature range from -22 C to 85 C. Fabricated in a baseline 65 nm CMOS technology, the frequency reference circuit occupies 0.11 mm

Low Power RF IC Design for Wireless Communication

In this paper, the many issues around the system and circuit design of advanced RF front ends for wireless RF applications will be discussed. After a short discussion on technology related issues, design choices linked to the different circuit/system solutions will be discussed.</p

Ultra wide band (UWB) technology

Short-range communication systems (known as wireless personal area network [WPAN] systems) with ranges of up to 10 m are becoming popular for replacing cables and enabling new consumer applications. However, systems such as Bluetooth and Zigbee, which operate in the 2.4 GHz ISM band, have a limited data rate, typically about 1 Mbps, which is insufficient for many applications, such as fast transfer of large files (e.g., wireless USB) and high-quality video streaming. To increase the data rate to several hundreds of Mbps, a higher bandwidth is preferred over a larger signal-to-noise ratio (SNR). This became possible when the FCC released frequency spectrum for ultra wide band (UWB) in the United States spanning from 3.1 to 10.6 GHz with an average transmit power level of only -41.3 dBm/MHz [1]. Since then, several proposals have been presented to realize a shortrange high data rate communication link. At present, both direct-sequence impulse communication and multiband orthogonal frequency division multiplexing (MB-OFDM) UWB systems are under consideration as a standard within the IEEE under IEEE802.15.3a. Industry has adopted MBOFDM UWB for high data rates as the ECMA-368 standard [2].</p

Symbolic analysis of large signals in nonlinear systems

A method is proposed to obtain symbolic expressions for the large signal behavior in nonlinear circuits. The expressions are described in terms of a nonlinear operator. The method is valid when nonlinear component behavior is piecewise linear approximated. The method is a large extension of the technique as proposed by Fernandez.</p

Data Processing Using Nonlinear Wave Propagation: The Meta-Stable State

Recently, a new electronic system architecture for Flash AD conversion has been proposed based on wave propagation in resistively coupled Nagumo cells [1]. In this paper the relation between wave propagation, the parameters and initial conditions of such a system are analyzed in more detail with a focus on the meta-stable situation. Furthermore, the advantages of the new architecture are discussed.